Current & Recent Projects   

• 첨단산업 인재양성 부트캠프사업 (반도체): (교육부/한국산업기술진흥원 2024.03~2029.02) 

• 초고속반도체 IC설계 및 테스트/신호무결성 전문인력양성사업: (교육부/산업통상자원부 2022.07~2025.2) 
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• 차세대화합물반도체핵심기술개발사업: 1200V GaN IC 개발 (과기정통부 2022.04~2026.12) 
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• 차세대반도체 전문인력양성 사업 (산업통상자원부/한국산업기술진흥원 2022.03~2027.02) 
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• 한국연구재단 두뇌한국21 BK21플러스 사업 교육연구팀 (교육부/한국연구재단 2020~2027)
    "차세대 Terahertz 통신-반도체 인력양성팀"
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• 10GHz급 Jitter Attenuation and Frequeny Multiplication 기술 개발
  (삼성전자 Samsung Electronics 2020~2021)
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• 초슬림/초박형 무선 전력/Data 전송용 AC-DC & DC-DC 시스템 설계
  (삼성전자 Samsung Electronics 2020~2021)
  
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• Next-generation Tera-bps Integrated Silicon-Photonics Link PHY Technology
  (과기정통부/한국연구재단 중견연구사업 2019~2022)
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• 초고속컴퓨팅 지능형반도체 전문인력 양성사업 초고속컴퓨팅 지능형반도체 전문인력 양성사업 (산자부/한국반도체산업협회 2016~2021)
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• High performance DCC for Mobile Memories (중소기업청 2016~2017)
• 3.5Gbps Low-Power SerDes/CDR for wireless chip-to-chip Zing System (ETRI 한국전자통신연구원 2015)
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• Digital Delay-Locked Loops for DDR2/DDR3 SDRAMs (Jeju Semiconductor ㈜제주반도체)
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• Low-power high-performance clocking systems for Specialty DDR-x SDRAMs (중소기업청 2014~2015)
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• Low power SerDes for Zing System (ETRI 한국전자통신연구원 2014)
• Design of ultra high-speed semiconductor interface technology (대학산업기술지원단)
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• 수요기반 창의IP 사업화 지원사업?MDLL-based Fractional-Ratio Clock Generator (특허청/Kipex/Linkus 2014)
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• 20Gbps SerDes and CDR for Wireline &Wireless Transceivers (Samsung Electronics삼성전자 종합기술원 2013~2014)
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• Triple Output Power Management IC (DC-DC Converter) for AMOLED Displays (국내 Fabless Company 2013~2014)
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• SMD RF Isolator (중소기업청 2013)
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• Power Detector IC for high frequency communication systems (중소기업청 2013)
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• mmWave Wireless Chip-to-Chip Communication Transceiver (Samsung Electronics삼성전자)
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• Dual Power DC-DC Converter (국내 Fabless Company 2012)
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• Development of Analog and Interface IP for Smart Phone and Smart TV SoC (지식경제부 2011~2014)
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• Digital Frequency Synthesizers for Full-Digital Audio Amp Systems (중소기업청 2010~2012)
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• Variable Amplitude Pulse Generators for Piezoelectric Inkjet Printers (지식경제부)
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• Digital spread-spectrum clock generators (SSCGs) for EMI reduction (서울특별시)
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• DLL-based frequency multipliers &Synthesizers
• Wireline/Wireless RF-Interconnect Circuits and Systems for On- and Off-Chip Communications
• Advanced memory buffer chip design for high-speed DRAMs
• High-speed &low-power Delay-Locked Loop (DLL) design
• Programmable duty cycle and delay adjustment circuit design
• Latency-aware multi-core SMP system design using reconfigurable RF interconnect
• Temperature compensated display driver IC design